Usually, in such capacitive sensors for measuring a physical parameter, the mobile common electrode forms part of an armature resiliently held between the two fixed electrodes. This common electrode is capable of moving a certain distance in the direction of one or the other of the fixed electrodes via the action of a force for example. In the inoperative state, the common electrode is at an approximately equal distance from the two fixed electrodes, which defines equal capacitive values for the two capacitors. When the common electrode moves via the action for example of a force, the capacitive value of each capacitor varies inversely. The electronic interface circuit of a capacitive sensor is thus for providing an output signal in the form of a voltage dependent on the variation in the capacitances of the two capacitors.
In an ideal case, the output voltage varies in a linear manner in relation to the movement of the mobile common electrode. However, as the electronic circuit is made in the form of an integrated circuit in a semiconductor substrate, stray capacitances, which are added to the capacitances of the capacitors, must be taken into account. These stray capacitances are practically independent of the movement of the common electrode, which creates non-linearities. Consequently, the output voltage of the electronic circuit does not vary linearly in relation to the movement of the moving common electrode. These stray capacitances also have the effect of lowering the sensitivity or yield of the electronic circuit.
As the MEMS type sensor is also integrated in a semiconductor substrate, such as a silicon substrate, there is also a problem of non-linearity linked to the potential of the substrate during operation of the sensor. This substrate potential is difficult to control over the entire structure of the sensor, since the substrate is never totally conductive. Because of this non-linearity, the measured electrostatic force is not zero in the sensor and electronic circuit off mode. Because of the influence of the substrate potential on the electrostatic force, this leads to a variation in the measured real force, which is applied across the moving common electrode, which is a drawback.
In order generally to take a force, acceleration or pressure measurement, the fixed electrodes of the two capacitors are biased or excited cyclically by voltages of opposite polarity relative to an inoperative reference voltage. By biasing or polarizing the two fixed electrodes at different voltage levels, the charge difference across the moving electrode can be measured and converted into an electronic circuit output voltage. When the output voltage is stabilised at its final value, the total charge across the moving electrode becomes zero. This output voltage can be supplied sampled to a processing circuit able to provide acceleration, force, pressure or angular velocity data depending upon the structure of the sensor.
An electronic interface circuit of a capacitive sensor of the prior art is shown in FIG. 1, and the activation thereof is illustrated by a temporal diagram of various voltage signals in FIG. 2. The electronic circuit shown is based on an electronic circuit described in the article by Messrs H. Leutold and F. Rudolph, which appeared in the review entitled “Sensors and actuators” A21-A23 (1990), pages 278 to 281, and also by FR Patent No. 2 720 510.
The electronic circuit 1 shown is an interface of a capacitive sensor 2, which includes two differential mounted capacitors having a common electrode Cm able to move between two fixed electrodes to define two capacitors C1 and C2. Electronic circuit 1 includes a charge transfer amplifier unit 4, which is linked at input to the common electrode Cm, an integrator unit 5 to supply permanently at output a voltage Vm equal to the integral of charges provided by the amplifier unit 4, and an excitation unit 3 for cyclically biasing or polarizing the fixed electrodes at determined voltage levels.
Excitation unit 3 comprises four switches 12, 13, 14 and 15, which can be formed by MOS switching transistors in the integrated circuit. The first switch 12 is arranged between the output of integrator 5 and the fixed electrode of capacitor C1. The second switch 13 is arranged between the integrator output and the fixed electrode of capacitor C2. The third switch 14 is arranged between the high voltage terminal VDD of a voltage source and the fixed electrode of capacitor C1. Finally, the fourth switch 15 is arranged between the low voltage terminal VSS of the voltage source and the fixed electrode of capacitor C2.
In the electronic circuit operating mode, each cycle or successive measurement period is divided into two phases P1 and P2 as shown in FIG. 2. The passage from one phase to the other is controlled by clock signals that are not shown for respectively opening or closing the switches. Switches 12 and 13 are closed by signals SW2 at the “1” state in the first phase designated P1 in FIGS. 1 and 2, whereas switches 14 and 15 are open in this first phase P1. In this first phase P1, voltage Vm present at the integrator output is applied to each electrode of the sensor so as to completely discharge the two capacitors as shown by voltage diagrams VC1, VCm and VC2.
Switches 14 and 15 are closed by signals SW1 at the “1” state in the second phase designated P2, whereas switches 12 and 13 are open. In this second phase P2, voltage VDD is applied to the fixed electrode C1 seen in the VC1 diagram, whereas voltage VSS is applied to fixed electrode C2 seen in the VC2 diagram. If the moving electrode is moved a certain distance in the direction of one or other of the fixed electrodes, the capacitances of the capacitors will vary inversely. This will lead to a difference in the charge accumulated by each capacitor, which also depends upon the voltage Vm applied previously to each electrode of the capacitors.
The final value of voltage Vm at the integrator output is obtained after several operating cycles of the electronic circuit as a function of the movement of the moving electrode between the two fixed electrodes as shown in the voltage VCm diagram. In this case, the common electrode is moved in the direction of the fixed electrode of capacitor C1, which results in a final integrator output voltage, which is above the medium voltage VDD/2. The potential of the common electrode has thus been adjusted so as to cancel out any charge flow and thus keep the total charge at zero in accordance with the principle of charge compensation.
For the operation of transferring charges accumulated by the common electrode Cm, the charge transfer amplifier unit 4 includes an operational amplifier 10, three capacitors C3, C4 and C5 and two switches 16 and 17. The inverter input of this amplifier is connected to common electrode Cm. Capacitor C3 in parallel with switch 16 is connected between the inverter input and the output of amplifier 10. Capacitor C4 is connected between the output of amplifier 10 and the input of integrator unit 5. Capacitor C5 is connected between the non-inverter input and a voltage reference terminal Vref, which can be defined as a mass DC equal to VSS or VDD/2 or to another potential. Finally, switch 17 is arranged between the output of integrator unit 5 and the non-inverter input of amplifier 10.
In the electronic circuit operating mode, the two switches 16 and 17 are closed by signals SW2 at the “1” state in the first phase P1 to partly discharge capacitor C3 and to polarize capacitor C5 with the output voltage Vm at the non-inverter input of the amplifier. The voltage level Vm of capacitor C5 is maintained during the second phase P2.
Integrator unit 5, which follows charge transfer amplifier unit 4, includes two input switches 18 and 19, an operational amplifier 11 and an integration capacitor Cf. this capacitor Cf is connected between the inverter input and the output of amplifier 11, which provides the output voltage Vm of integrator 5. The input switch 18 is arranged between the output terminal of capacitor C4 of charge transfer unit 4 and the non-inverter input of amplifier 11. The potential of this non-inverter input of amplifier 11 is fixed to the voltage reference Vref. The switch 19 is arranged between the output terminal of capacitor C4 of charge transfer unit 4 and the inverter input of amplifier 11.
In the electronic circuit operating mode, switch 18 is closed by signals SW2 at the “1” state in the first phase P1 so that the voltage at the terminals of capacitor C4 of the charge transfer unit is equal to Vm if the reference voltage Vref is at earth. Switch 19 is closed by signals SW1 at the “1” state in the second phase P2 to control a charge flow between the output terminal of capacitor C4 of charge transfer unit 4 and integrator 5. This charge flow from charge transfer amplifier unit 4 is integrated in capacitor Cf. Thus, the output voltage Vm is altered by a quantity proportional to the charge accumulated across the common moving electrode during the second phase.
The operation of the electronic circuit described hereinbefore is of the asymmetrical type, since the fixed electrode of the capacitor C1 is always polarized at the same potential VDD in each second phase P2, whereas the fixed electrode of capacitor C2 is always biased at VSS in each second phase P2. This type of integrated electronic circuit thus encounters the same problems of non-linearity mentioned above in relation to stray capacitances and the substrate potential, which is a drawback. Moreover, since the electronic circuit is made in the form of an integrated circuit, any voltage offset linked to unmatched electronic components cannot be removed, which is another drawback.
The U.S. Pat. No. 5,977,803 describes an interface circuit of a capacitive sensor, which includes two capacitors mounted in differential. This interface circuit is more compact than the interface circuit described in reference to FIG. 1, since it uses for measurement of capacitive value difference converted in a measurement output voltage only an operational amplifier directly connected to the capacitive sensor. In each measurement cycle, the sensor capacitors are directly discharged by the output voltage value of the operational amplifier. Even if the polarity of the voltage which is applied to each fixed electrode of the capacitors, is modified at the end of several measurement cycles, the interface circuit does not allow solve the problems above-mentioned, which is a drawback.